// ChanHWStatus.cc // Contact person: Gabriel D. Orebi Gann // See ChanHWStatus.hh for more details //———————————————————————// #include #include #include #include #include #include using namespace RAT; using namespace RAT::DU; #include using namespace std; const int ChanHWStatus::fMaskTubeAtHV = 0x1D000011; const int ChanHWStatus::fMaskSNOTubeOn = 0x5D09071D; const int ChanHWStatus::fMaskTubeOn = 0x5D09071D; // Set SNO+ to SNO value for now but revisit this const int ChanHWStatus::fMaskSNODAQable = 0x5D09071D; // SNO didn't distinguish between MC and DAQ const int ChanHWStatus::fMaskDAQable = 0x5D09071D; // Set SNO+ to SNO value for now but revisit this const int ChanHWStatus::fMaskECAActive = 0x10705; // Check whether the channel can get data ClassImp( RAT::DU::ChanHWStatus ) void ChanHWStatus::BeginOfRun() { // Read in DQCH and DQCR values from DB DBLinkPtr lDQXX = DB::Get()->GetLink( "PMT_DQXX" ); fDQCR = lDQXX->GetIArray( "dqcr" ); fDQCH = lDQXX->GetIArray( "dqch" ); fDQID = lDQXX->GetIArray("dqid"); // Check the lengths of these arrays Log::Assert( fDQCR.size() == 304, "ChanHWStatus::BeginOfRun: Length of DQCR does not match expectation (304)." ); Log::Assert( fDQCH.size() == 9728, "ChanHWStatus::BeginOfRun: Length of DQCH does not match expectation (9728)." ); fStatusN100 = lDQXX->GetI( "cratestatus_n100" ); fStatusN20 = lDQXX->GetI( "cratestatus_n20" ); fStatusELO = lDQXX->GetI( "cratestatus_esumL" ); fStatusEHI = lDQXX->GetI( "cratestatus_esumH" ); fStatusON = lDQXX->GetI( "cratestatus_owlN" ); fStatusOELO = lDQXX->GetI( "cratestatus_owlEL" ); fStatusOEHI = lDQXX->GetI( "cratestatus_owlEH" ); DBLinkPtr lDAQ = DB::Get()->GetLink( "DAQ" ); fUseConstantThreshold = ( lDAQ->GetI( "use_const_channel_thresh" ) == 1 ); fConstantThreshold = lDAQ->GetI( "const_channel_thresh" ); fSNO = ( lDAQ->GetI( "dqxx_expt" ) == 1 ); // 0 is SNO+, 1 is SNO fEnabled = ( lDAQ->GetI( "dqxx_info" ) == 1 ); // Initialize DQXX for all channels // Combine the DQCH and DQCR words into a single DQXX word fDQXX.resize( fDQCH.size() ); for( unsigned int lcn = 0; lcn < fDQXX.size(); lcn++ ) { // Get DQCH, DQCR words const int dqch = fDQCH.at( lcn ); int icrate = BitManip::GetCrate( lcn ); int icard = BitManip::GetCard( lcn ); const int dqcr = fDQCR.at( 16 * icrate + icard ); const int db = BitManip::GetBits(lcn, 0, 5) >> 3; // Initialise return value ( sets all bits to 1 ) int dqxx = -1; // Generate DQXX from DQCR and DQCH BitManip::CopyFlipBit( dqcr, DQCRBITS::CRATE, dqxx, DQXXBITS::CRATE ); BitManip::CopyFlipBit( dqcr, DQCRBITS::GT, dqxx, DQXXBITS::GT ); BitManip::CopyFlipBit( dqcr, DQCRBITS::CR_ONLINE, dqxx, DQXXBITS::CR_ONLINE ); BitManip::CopyFlipBit( dqcr, DQCRBITS::CR_HV, dqxx, DQXXBITS::CR_HV ); BitManip::CopyFlipBit( dqcr, DQCRBITS::MB, dqxx, DQXXBITS::MB ); BitManip::CopyFlipBit( dqcr, DQCRBITS::PMTIC, dqxx, DQXXBITS::PMTIC ); BitManip::CopyFlipBit( dqcr, DQCRBITS::DAQ, dqxx, DQXXBITS::DAQ ); BitManip::CopyFlipBit( dqcr, DQCRBITS::DC + db, dqxx, DQXXBITS::DC ); BitManip::CopyFlipBit( dqcr, DQCRBITS::RELAY + db, dqxx, DQXXBITS::RELAY ); BitManip::CopyFlipBit( dqcr, DQCRBITS::SLOT_OP, dqxx, DQXXBITS::SLOT_OP ); BitManip::CopyFlipBit( dqch, DQCHBITS::PMT_CABLE, dqxx, DQXXBITS::PMT_CABLE ); BitManip::CopyFlipBit( dqch, DQCHBITS::PMTIC_RESISTOR, dqxx, DQXXBITS::PMTIC_RESISTOR ); BitManip::CopyFlipBit( dqch, DQCHBITS::SEQUENCER, dqxx, DQXXBITS::SEQUENCER ); BitManip::CopyFlipBit( dqch, DQCHBITS::NS100, dqxx, DQXXBITS::NS100 ); BitManip::CopyFlipBit( dqch, DQCHBITS::NS20, dqxx, DQXXBITS::NS20 ); BitManip::CopyFlipBit( dqch, DQCHBITS::NOT_OP, dqxx, DQXXBITS::NOT_OP ); BitManip::CopyFlipBit( dqch, DQCHBITS::OHM75, dqxx, DQXXBITS::OHM75 ); BitManip::CopyFlipBit( dqch, DQCHBITS::QINJ, dqxx, DQXXBITS::QINJ ); BitManip::CopyFlipBit( dqch, DQCHBITS::N100, dqxx, DQXXBITS::N100 ); BitManip::CopyFlipBit( dqch, DQCHBITS::N20, dqxx, DQXXBITS::N20 ); // Check for maxed-out threshold ( value of 255 ) int threshold = BitManip::GetBits( dqch, DQCHBITS::VTHR, 8 ); if ( threshold == 255 ) dqxx = BitManip::ClearBit( dqxx,DQXXBITS::VTHR_MAX ); fDQXX.at( lcn ) = dqxx; } detail << "ChanHWStatus::BeginOfRun: Loaded DQXX information for " << fDQXX.size() << " channels." << newline; } int ChanHWStatus::GetThreshold( const unsigned int lcn ) const { // Should this method not also return the constant threshold? GOG const int dqch = fDQCH.at( lcn ); return BitManip::GetBits( dqch, DQCHBITS::VTHR, 8 ); } int ChanHWStatus::GetThresholdZero( const unsigned int lcn ) const { const int dqch = fDQCH.at( lcn ); return BitManip::GetBits( dqch, DQCHBITS::VTHR_ZERO, 8 ); } int ChanHWStatus::GetThresholdAboveNoise( const unsigned int lcn ) const { if( fUseConstantThreshold ) return fConstantThreshold; else return GetThreshold( lcn ) - GetThresholdZero( lcn ); } int ChanHWStatus::GetMBID( const unsigned int lcn ) const { /* Board IDs are stored in a per-card basis in the * following order: * - Mother board ID * - PMTIC ID * - DB IDs (4 values) */ int mbid = 0; int ca = (lcn/32)%16; int cr = lcn/(32*16); mbid = fDQID[cr*16*6 + ca*6]; return mbid; } int ChanHWStatus::GetDBID( const unsigned int lcn ) const { /* Board IDs are stored in a per-card basis in the * following order: * - Mother board ID * - PMTIC ID * - DB IDs (4 values) */ int mbid = 0; int ch = lcn%(32); int ca = (lcn/32)%16; int cr = lcn/(32*16); int db = ch/8; mbid = fDQID[cr*16*6 + ca*6 + 1 + db+1]; return mbid; } bool ChanHWStatus::IsTubeOnline( const unsigned int lcn ) const { const int mask = ( fSNO ? fMaskSNOTubeOn : fMaskTubeOn ); return BitManip::TestMask( fDQXX.at( lcn ), mask ); } bool ChanHWStatus::IsTubeAtHighVoltage( const unsigned int lcn ) const { return BitManip::TestMask( fDQXX.at( lcn ), fMaskTubeAtHV ); } bool ChanHWStatus::IsChannelOnline( const unsigned int lcn ) const { const int mask = ( fSNO ? fMaskSNOTubeOn : fMaskTubeOn ); const int bits = BitManip::GetBits( mask, 0, 23 ); return BitManip::TestMask( fDQXX.at( lcn ), bits ); } bool ChanHWStatus::IsDAQEnabled( const unsigned int lcn ) const { const int mask = ( fSNO ? fMaskSNODAQable : fMaskDAQable ); return BitManip::TestMask( fDQXX.at( lcn ), mask ); } bool ChanHWStatus::IsNHit100Enabled( const unsigned int lcn ) const { unsigned int cratestatus; if(DU::Utility::Get()->GetPMTInfo().GetType(lcn) == DU::PMTInfo::OWL){cratestatus = fStatusON;} else{cratestatus = fStatusN100;} const bool crateIn = ( fSNO ? true : !BitManip::TestBit( cratestatus, BitManip::GetCrate( lcn ) ) ); const bool enabled = !( BitManip::TestBit( fDQCH.at( lcn ), DQCHBITS::NS100 ) ); return enabled && crateIn; } bool ChanHWStatus::IsNHit20Enabled( const unsigned int lcn ) const { if(DU::Utility::Get()->GetPMTInfo().GetType(lcn) == DU::PMTInfo::OWL)return false; // No NH20 for OWLs const bool crateIn = ( fSNO ? true : !BitManip::TestBit( fStatusN20, BitManip::GetCrate( lcn ) ) ); const bool enabled = !( BitManip::TestBit( fDQCH.at( lcn ), DQCHBITS::NS20 ) ); return enabled && crateIn; } bool ChanHWStatus::IsEsumLowEnabled( const unsigned int lcn ) const { const int crate = BitManip::GetCrate( lcn ); unsigned int cratestatus; if(DU::Utility::Get()->GetPMTInfo().GetType(lcn) == DU::PMTInfo::OWL){cratestatus = fStatusOELO;} else{cratestatus = fStatusELO;} return ( fSNO ? true : !( BitManip::TestBit( cratestatus, crate ) ) ); // Always enabled in SNO } bool ChanHWStatus::IsEsumHighEnabled( const unsigned int lcn ) const { const int crate = BitManip::GetCrate( lcn ); unsigned int cratestatus; if(DU::Utility::Get()->GetPMTInfo().GetType(lcn) == DU::PMTInfo::OWL){cratestatus = fStatusOEHI;} else{cratestatus = fStatusEHI;} return ( fSNO ? true : !( BitManip::TestBit( cratestatus, crate ) ) ); // Always enabled in SNO } bool ChanHWStatus::IsSequencerEnabled( const unsigned int lcn ) const { return !( BitManip::TestBit( fDQCH.at( lcn ), DQCHBITS::SEQUENCER ) ); } bool ChanHWStatus::IsECAChannelActive( const unsigned int lcn ) const { return BitManip::TestMask( fDQXX.at( lcn ), fMaskECAActive ); }