////////////////////////////////////////////////////////////////////
/// \class RAT::DU::ChanHWStatus
///
/// \brief  Dynamic info about PMT status read from DQXX banks
///
/// \author Gabriel D. Orebi Gann <gorebigann@lbl.gov>
///
/// REVISION HISTORY:\n
///     19 Mar 2010 : Gabriel Orebi Gann - Add test for channel sequencer\n
///     17 Oct 2011 : Gabriel Orebi Gann - Move bit funcs to BitManip\n
///     25 Mar 2014 : GDOG - Add option to set const channel threshold for all channels\n
///     30 Sep 2013 : A. Mastbaum - Make singleton, change to ChannelHardwareStatus
///     2014-05-07 : P Jones - Move to DU, add doxygen, remove PMT ID methods\n
///     3 Jul 2014 : GDOG - remove separate OWL checks
///     4 Jul 2014 : JW change to ChanHWStatus
///     27 Feb 2015: F. Descamps - Change DQCR word to one per card
///     10 Jul 2015 : GDOG - fix IsChannelOnline test
///     1 Aug 2016 : E. Marzec - Add IsTubeAtHighVoltage test
///
/// \details This class reads in the DQCH and DQCR bank information
/// (output by the DAQ software) and contains a number of classes
/// for evaluating and testing the resultant DQXX word in order to
/// calculate channel thresholds and determine PMT status.
///
/// ChanHWStatus was historically known as DQXX (DQCR + DQCH)
///
////////////////////////////////////////////////////////////////////
#ifndef __RAT_DU_ChanHWStatus__
#define __RAT_DU_ChanHWStatus__

#include <TObject.h>

#include <vector>

namespace RAT
{
namespace DU
{

class ChanHWStatus : public TObject
{
public:
  /// Construct set constant threshold usage to false
  ChanHWStatus() : TObject(), fUseConstantThreshold(false), fEnabled(true) { }

  /// Initialize with current DB values at the start of a new run.
  void BeginOfRun();

  /// Check if the channel hardware status is enabled.
  ///
  /// @return true if enabled
  bool IsEnabled() const { return fEnabled; }

  /// Get the full ChanHWStatus/DQXX word for a channel.
  ///
  /// @param[in] lcn logical channel number
  /// @return the full word
  /// @throws out_of_range if the index is out of range
  int GetWord( const unsigned int lcn ) const { return fDQXX.at( lcn ); }

  /// Get the threshold for a channel.
  ///
  /// @param[in] lcn logical channel number
  /// @return the threshold
  int GetThreshold( const unsigned int lcn ) const;

  /// Get the noise level ( threshold zero ) for a channel.
  ///
  /// @param[in] lcn logical channel number
  /// @return the noise level
  int GetThresholdZero( const unsigned int lcn ) const;

  /// Get the threshold for a channel
  ///
  /// @param[in] lcn logical channel number
  /// @return the threshold above noise
  int GetThresholdAboveNoise( const unsigned int lcn ) const;

  /// Get Mother Board ID for a channel
  ///
  /// @param[in] lcn logical channel number
  /// @return the mother board ID
  int GetMBID( const unsigned int lcn ) const;

  /// Get Daughter Board ID for a channel
  ///
  /// @param[in] lcn logical channel number
  /// @return the daughter board ID
  int GetDBID( const unsigned int lcn ) const;

  /// Check if a PMT is online.
  ///
  /// @param[in] lcn logical channel number
  /// @return true if the PMT is online
  bool IsTubeOnline( const unsigned int lcn ) const;

  /// Check if a PMT has high voltage on it
  ///
  /// @param[in] lcn logical channel number
  /// @return true if the PMT is at high voltage
  bool IsTubeAtHighVoltage(const unsigned int lcn) const;

  /// Check if an electronics channel is online.
  ///
  /// @param[in] lcn logical channel number
  /// @return true if the channel is online
  bool IsChannelOnline( const unsigned int lcn ) const;

  /// Check if DAQ is enabled.
  ///
  /// @param[in] lcn logical channel number
  /// @return true if the daq is enabled for the channel
  bool IsDAQEnabled( const unsigned int lcn ) const;

  /// Check if NHIT100 trigger is enabled.
  ///
  /// @param[in] lcn logical channel number
  /// @return true if the NHit 100 trigger is enabled for the channel
  bool IsNHit100Enabled( const unsigned int lcn ) const;

  /// Check if NHIT20 trigger is enabled.
  ///
  /// @param[in] lcn logical channel number
  /// @return true if the NHit 20 trigger is enabled for the channel
  bool IsNHit20Enabled( const unsigned int lcn ) const;

  /// Check if ESUMLO trigger is enabled.
  ///
  /// @param[in] lcn logical channel number
  /// @return true if the Esum Low trigger is enabled for the channel
  bool IsEsumLowEnabled( const unsigned int lcn ) const;

  /// Check if ESUMHI trigger is enabled.
  ///
  /// @param[in] lcn logical channel number
  /// @return true if the Esum High trigger is enabled for the channel
  bool IsEsumHighEnabled( const unsigned int lcn ) const;

  /// Check if sequencer ( data collection ) is enabled.
  ///
  /// @param[in] lcn logical channel number
  /// @return true if the sequencer is enabled for the channel
  bool IsSequencerEnabled( const unsigned int lcn ) const;

  /// Check if the channel is good for ECA calibration.
  ///
  /// @param[in] lcn logical channel number
  /// @return true if the channel is good for ECA calibration.
  bool IsECAChannelActive( const unsigned int lcn ) const;

  // This ROOT macro adds dictionary methods to this class.
  // The number is 0 as this class is never, and should never be written to disc.
  // It assumes this class has no virtual methods, use ClassDef if change this.
  ClassDefNV( ChanHWStatus, 0 );
private:
  /// Bit indices for the DQXX word, bring on C++11
  struct DQXXBITS{ enum { CRATE = 0, SLOT_OP = 1, GT = 2, CR_ONLINE = 3, CR_HV = 4,
                          MB = 8, DC = 9, DAQ = 10, SEQUENCER = 16, NS100 = 17, NS20 = 18,
                          VTHR_MAX = 19, QINJ = 20, N100 = 21, N20 = 22, PMTIC = 24,
                          RELAY = 26, PMTIC_RESISTOR = 27, PMT_CABLE = 28, OHM75 = 29, NOT_OP = 30 }; };
  /// Bit indices for the DQCH word, bring on C++11
  struct DQCHBITS{ enum { PMT_CABLE = 0, PMTIC_RESISTOR = 1, SEQUENCER = 2, NS100 = 3, NS20 = 4,
                          OHM75 = 5, QINJ = 6, N100 = 7, N20 = 8, NOT_OP = 9, AD = 10, VTHR = 16,
                          VTHR_ZERO = 24 }; };
  /// Bit indices for the DQCR word, bring on C++11
  struct DQCRBITS{ enum { CRATE = 0, MB = 1, PMTIC = 2, DAQ = 3, DC = 4, SLOT_OP = 8, GT = 9,
                          CR_ONLINE = 10, CR_HV = 11, RELAY = 12, HV = 16 }; };

  std::vector<int> fDQCH; ///< DQCH bits for each LCN
  std::vector<int> fDQCR; ///< DQCR bits for each LCN
  std::vector<int> fDQXX; ///< Combined DQXX bits for each LCN
  std::vector<int> fDQID; ///< Board IDs (MB, PMTIC, DBx4)

  // Trigger status
  int fStatusN100; ///< Mask of crates enabled for NHIT100 triggers
  int fStatusN20; ///< Mask of crates enabled for NHIT20 triggers
  int fStatusELO; ///< Mask of crates enabled for ESUM LO triggers
  int fStatusEHI; ///< Mask of crates enabled for ESUM HI triggers
  int fStatusON; ///< Mask of crates enabled for OWL NHIT triggers
  int fStatusOELO; ///< Mask of crates enabled for OWL ESUM LO triggers
  int fStatusOEHI; ///< Mask of crates enabled for OWL ESUM HI triggers

  // Masks
  static const int fMaskTubeOn; ///< SNO+ bit mask signifying a PMT being "on"
  static const int fMaskSNOTubeOn; ///< SNO bit mask signifying a PMT being "on"
  static const int fMaskDAQable; ///< SNO+ bit mask signifying a channel enabled in DAQ
  static const int fMaskSNODAQable; ///< SNO bit mask signifying a channel enabled in DAQ
  static const int fMaskTubeAtHV; ///< SNO+ bit mask signifying tube being at HV
  static const int fMaskECAActive; ///< Check whether the channel can get data

  int fConstantThreshold; ///< Constant threshold value
  bool fSNO; ///< True if CHS is in SNO mode (as specified by the ratdb).
  bool fUseConstantThreshold; ///< True if a constant threshold should be used
  bool fEnabled; ///< True if the channel hardware status information is enabled

}; // class ChanHWStatus

} // ::DU

} // namespace RAT

#endif // __RAT_DU_ChanHWStatus__